Freescale Semiconductor /MK60D10 /ENET /MSCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as MSCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MII_SPEED0 (0)DIS_PRE 0 (000)HOLDTIME

HOLDTIME=000, DIS_PRE=0

Description

MII Speed Control Register

Fields

MII_SPEED

MII Speed

DIS_PRE

Disable Preamble

0 (0): Preamble enabled.

1 (1): Preamble (32 ones) is not prepended to the MII management frame.

HOLDTIME

Holdtime On MDIO Output

0 (000): 1 internal module clock cycle

1 (001): 2 internal module clock cycles

2 (010): 3 internal module clock cycles

7 (111): 8 internal module clock cycles

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